DLP-HS-FPGA2产品概述
Features:
Xilinx XC3S200A-4FTG256C FPGA utilized on the DLP-HS-FPGA
Xilinx XC3S400A-4FTG256C FPGA utilized on the DLP-HS-FPGA2
Micron 32M x 8 DDR2 SDRAM Memory
Built-In Configuration Loader; Writes the Bit File Directly to SPI Flash via High-Speed USB 2.0 Interface
63 User I/O Channels: 24 Differential Pairs and 8 Global Clocks
66 MHz Oscillator
133 MHz DDR2 Interface Reference Design Provided
USB Port Powered or 5 V External Power Barrel Jack
USB 1.1 and 2.0 Compatible Interface
Small Footprint: 3.0 x 1.2-Inch PCB and Standard 50-Pin, 0.9-Inch DIP Interface
Datasheet
